ch32v20x_spi.c 21 KB

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  1. /********************************** (C) COPYRIGHT *******************************
  2. * File Name : ch32v20x_spi.c
  3. * Author : WCH
  4. * Version : V1.0.0
  5. * Date : 2021/06/06
  6. * Description : This file provides all the SPI firmware functions.
  7. *********************************************************************************
  8. * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
  9. * Attention: This software (modified or not) and binary are used for
  10. * microcontroller manufactured by Nanjing Qinheng Microelectronics.
  11. *******************************************************************************/
  12. #include "ch32v20x_spi.h"
  13. #include "ch32v20x_rcc.h"
  14. /* SPI SPE mask */
  15. #define CTLR1_SPE_Set ((uint16_t)0x0040)
  16. #define CTLR1_SPE_Reset ((uint16_t)0xFFBF)
  17. /* I2S I2SE mask */
  18. #define I2SCFGR_I2SE_Set ((uint16_t)0x0400)
  19. #define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF)
  20. /* SPI CRCNext mask */
  21. #define CTLR1_CRCNext_Set ((uint16_t)0x1000)
  22. /* SPI CRCEN mask */
  23. #define CTLR1_CRCEN_Set ((uint16_t)0x2000)
  24. #define CTLR1_CRCEN_Reset ((uint16_t)0xDFFF)
  25. /* SPI SSOE mask */
  26. #define CTLR2_SSOE_Set ((uint16_t)0x0004)
  27. #define CTLR2_SSOE_Reset ((uint16_t)0xFFFB)
  28. /* SPI registers Masks */
  29. #define CTLR1_CLEAR_Mask ((uint16_t)0x3040)
  30. #define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
  31. /* SPI or I2S mode selection masks */
  32. #define SPI_Mode_Select ((uint16_t)0xF7FF)
  33. #define I2S_Mode_Select ((uint16_t)0x0800)
  34. /* I2S clock source selection masks */
  35. #define I2S2_CLOCK_SRC ((uint32_t)(0x00020000))
  36. #define I2S3_CLOCK_SRC ((uint32_t)(0x00040000))
  37. #define I2S_MUL_MASK ((uint32_t)(0x0000F000))
  38. #define I2S_DIV_MASK ((uint32_t)(0x000000F0))
  39. /*********************************************************************
  40. * @fn SPI_I2S_DeInit
  41. *
  42. * @brief Deinitializes the SPIx peripheral registers to their default
  43. * reset values (Affects also the I2Ss).
  44. *
  45. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  46. *
  47. * @return none
  48. */
  49. void SPI_I2S_DeInit(SPI_TypeDef *SPIx)
  50. {
  51. if(SPIx == SPI1)
  52. {
  53. RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
  54. RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
  55. }
  56. else if(SPIx == SPI2)
  57. {
  58. RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
  59. RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
  60. }
  61. }
  62. /*********************************************************************
  63. * @fn SPI_Init
  64. *
  65. * @brief Initializes the SPIx peripheral according to the specified
  66. * parameters in the SPI_InitStruct.
  67. *
  68. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  69. * SPI_InitStruct - pointer to a SPI_InitTypeDef structure that
  70. * contains the configuration information for the specified SPI peripheral.
  71. *
  72. * @return none
  73. */
  74. void SPI_Init(SPI_TypeDef *SPIx, SPI_InitTypeDef *SPI_InitStruct)
  75. {
  76. uint16_t tmpreg = 0;
  77. tmpreg = SPIx->CTLR1;
  78. tmpreg &= CTLR1_CLEAR_Mask;
  79. tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
  80. SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
  81. SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
  82. SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
  83. SPIx->CTLR1 = tmpreg;
  84. SPIx->I2SCFGR &= SPI_Mode_Select;
  85. SPIx->CRCR = SPI_InitStruct->SPI_CRCPolynomial;
  86. }
  87. /*********************************************************************
  88. * @fn I2S_Init
  89. *
  90. * @brief Initializes the SPIx peripheral according to the specified
  91. * parameters in the I2S_InitStruct.
  92. *
  93. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  94. * (configured in I2S mode).
  95. * I2S_InitStruct - pointer to an I2S_InitTypeDef structure that
  96. * contains the configuration information for the specified SPI peripheral
  97. * configured in I2S mode.
  98. *
  99. * @return none
  100. */
  101. void I2S_Init(SPI_TypeDef *SPIx, I2S_InitTypeDef *I2S_InitStruct)
  102. {
  103. uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
  104. uint32_t tmp = 0;
  105. RCC_ClocksTypeDef RCC_Clocks;
  106. uint32_t sourceclock = 0;
  107. SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
  108. SPIx->I2SPR = 0x0002;
  109. tmpreg = SPIx->I2SCFGR;
  110. if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
  111. {
  112. i2sodd = (uint16_t)0;
  113. i2sdiv = (uint16_t)2;
  114. }
  115. else
  116. {
  117. if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
  118. {
  119. packetlength = 1;
  120. }
  121. else
  122. {
  123. packetlength = 2;
  124. }
  125. if(((uint32_t)SPIx) == SPI2_BASE)
  126. {
  127. tmp = I2S2_CLOCK_SRC;
  128. }
  129. else
  130. {
  131. tmp = I2S3_CLOCK_SRC;
  132. }
  133. RCC_GetClocksFreq(&RCC_Clocks);
  134. sourceclock = RCC_Clocks.SYSCLK_Frequency;
  135. if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
  136. {
  137. tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
  138. }
  139. else
  140. {
  141. tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
  142. }
  143. tmp = tmp / 10;
  144. i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
  145. i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
  146. i2sodd = (uint16_t)(i2sodd << 8);
  147. }
  148. if((i2sdiv < 2) || (i2sdiv > 0xFF))
  149. {
  150. i2sdiv = 2;
  151. i2sodd = 0;
  152. }
  153. SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
  154. tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode |
  155. (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat |
  156. (uint16_t)I2S_InitStruct->I2S_CPOL))));
  157. SPIx->I2SCFGR = tmpreg;
  158. }
  159. /*********************************************************************
  160. * @fn SPI_StructInit
  161. *
  162. * @brief Fills each SPI_InitStruct member with its default value.
  163. *
  164. * @param SPI_InitStruct - pointer to a SPI_InitTypeDef structure which
  165. * will be initialized.
  166. *
  167. * @return none
  168. */
  169. void SPI_StructInit(SPI_InitTypeDef *SPI_InitStruct)
  170. {
  171. SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
  172. SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
  173. SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
  174. SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
  175. SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
  176. SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
  177. SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
  178. SPI_InitStruct->SPI_CRCPolynomial = 7;
  179. }
  180. /*********************************************************************
  181. * @fn I2S_StructInit
  182. *
  183. * @brief Fills each I2S_InitStruct member with its default value.
  184. *
  185. * @param I2S_InitStruct - pointer to a I2S_InitTypeDef structure which
  186. * will be initialized.
  187. *
  188. * @return none
  189. */
  190. void I2S_StructInit(I2S_InitTypeDef *I2S_InitStruct)
  191. {
  192. I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
  193. I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
  194. I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
  195. I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
  196. I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
  197. I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
  198. }
  199. /*********************************************************************
  200. * @fn SPI_Cmd
  201. *
  202. * @brief Enables or disables the specified SPI peripheral.
  203. *
  204. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  205. * NewState - ENABLE or DISABLE.
  206. *
  207. * @return none
  208. */
  209. void SPI_Cmd(SPI_TypeDef *SPIx, FunctionalState NewState)
  210. {
  211. if(NewState != DISABLE)
  212. {
  213. SPIx->CTLR1 |= CTLR1_SPE_Set;
  214. }
  215. else
  216. {
  217. SPIx->CTLR1 &= CTLR1_SPE_Reset;
  218. }
  219. }
  220. /*********************************************************************
  221. * @fn I2S_Cmd
  222. *
  223. * @brief Enables or disables the specified SPI peripheral (in I2S mode).
  224. *
  225. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  226. * NewState - ENABLE or DISABLE.
  227. *
  228. * @return none
  229. */
  230. void I2S_Cmd(SPI_TypeDef *SPIx, FunctionalState NewState)
  231. {
  232. if(NewState != DISABLE)
  233. {
  234. SPIx->I2SCFGR |= I2SCFGR_I2SE_Set;
  235. }
  236. else
  237. {
  238. SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset;
  239. }
  240. }
  241. /*********************************************************************
  242. * @fn SPI_I2S_ITConfig
  243. *
  244. * @brief Enables or disables the specified SPI/I2S interrupts.
  245. *
  246. * @param SPIx - where x can be
  247. * - 1, 2 or 3 in SPI mode.
  248. * - 2 or 3 in I2S mode.
  249. * SPI_I2S_IT - specifies the SPI/I2S interrupt source to be
  250. * enabled or disabled.
  251. * SPI_I2S_IT_TXE - Tx buffer empty interrupt mask.
  252. * SPI_I2S_IT_RXNE - Rx buffer not empty interrupt mask.
  253. * SPI_I2S_IT_ERR - Error interrupt mask.
  254. * NewState: ENABLE or DISABLE.
  255. * @return none
  256. */
  257. void SPI_I2S_ITConfig(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
  258. {
  259. uint16_t itpos = 0, itmask = 0;
  260. itpos = SPI_I2S_IT >> 4;
  261. itmask = (uint16_t)1 << (uint16_t)itpos;
  262. if(NewState != DISABLE)
  263. {
  264. SPIx->CTLR2 |= itmask;
  265. }
  266. else
  267. {
  268. SPIx->CTLR2 &= (uint16_t)~itmask;
  269. }
  270. }
  271. /*********************************************************************
  272. * @fn SPI_I2S_DMACmd
  273. *
  274. * @brief Enables or disables the SPIx/I2Sx DMA interface.
  275. *
  276. * @param SPIx - where x can be
  277. * - 1, 2 or 3 in SPI mode.
  278. * - 2 or 3 in I2S mode.
  279. * SPI_I2S_DMAReq - specifies the SPI/I2S DMA transfer request to
  280. * be enabled or disabled.
  281. * SPI_I2S_DMAReq_Tx - Tx buffer DMA transfer request.
  282. * SPI_I2S_DMAReq_Rx - Rx buffer DMA transfer request.
  283. * NewState - ENABLE or DISABLE.
  284. *
  285. * @return none
  286. */
  287. void SPI_I2S_DMACmd(SPI_TypeDef *SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
  288. {
  289. if(NewState != DISABLE)
  290. {
  291. SPIx->CTLR2 |= SPI_I2S_DMAReq;
  292. }
  293. else
  294. {
  295. SPIx->CTLR2 &= (uint16_t)~SPI_I2S_DMAReq;
  296. }
  297. }
  298. /*********************************************************************
  299. * @fn SPI_I2S_SendData
  300. *
  301. * @brief Transmits a Data through the SPIx/I2Sx peripheral.
  302. *
  303. * @param SPIx - where x can be
  304. * - 1, 2 or 3 in SPI mode.
  305. * - 2 or 3 in I2S mode.
  306. * Data - Data to be transmitted.
  307. *
  308. * @return none
  309. */
  310. void SPI_I2S_SendData(SPI_TypeDef *SPIx, uint16_t Data)
  311. {
  312. SPIx->DATAR = Data;
  313. }
  314. /*********************************************************************
  315. * @fn SPI_I2S_ReceiveData
  316. *
  317. * @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
  318. *
  319. * @param SPIx - where x can be
  320. * - 1, 2 or 3 in SPI mode.
  321. * - 2 or 3 in I2S mode.
  322. * Data - Data to be transmitted.
  323. *
  324. * @return SPIx->DATAR - The value of the received data.
  325. */
  326. uint16_t SPI_I2S_ReceiveData(SPI_TypeDef *SPIx)
  327. {
  328. return SPIx->DATAR;
  329. }
  330. /*********************************************************************
  331. * @fn SPI_NSSInternalSoftwareConfig
  332. *
  333. * @brief Configures internally by software the NSS pin for the selected SPI.
  334. *
  335. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  336. * SPI_NSSInternalSoft -
  337. * SPI_NSSInternalSoft_Set - Set NSS pin internally.
  338. * SPI_NSSInternalSoft_Reset - Reset NSS pin internally.
  339. *
  340. * @return none
  341. */
  342. void SPI_NSSInternalSoftwareConfig(SPI_TypeDef *SPIx, uint16_t SPI_NSSInternalSoft)
  343. {
  344. if(SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
  345. {
  346. SPIx->CTLR1 |= SPI_NSSInternalSoft_Set;
  347. }
  348. else
  349. {
  350. SPIx->CTLR1 &= SPI_NSSInternalSoft_Reset;
  351. }
  352. }
  353. /*********************************************************************
  354. * @fn SPI_SSOutputCmd
  355. *
  356. * @brief Enables or disables the SS output for the selected SPI.
  357. *
  358. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  359. * NewState - new state of the SPIx SS output.
  360. *
  361. * @return none
  362. */
  363. void SPI_SSOutputCmd(SPI_TypeDef *SPIx, FunctionalState NewState)
  364. {
  365. if(NewState != DISABLE)
  366. {
  367. SPIx->CTLR2 |= CTLR2_SSOE_Set;
  368. }
  369. else
  370. {
  371. SPIx->CTLR2 &= CTLR2_SSOE_Reset;
  372. }
  373. }
  374. /*********************************************************************
  375. * @fn SPI_DataSizeConfig
  376. *
  377. * @brief Configures the data size for the selected SPI.
  378. *
  379. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  380. * SPI_DataSize - specifies the SPI data size.
  381. * SPI_DataSize_16b - Set data frame format to 16bit.
  382. * SPI_DataSize_8b - Set data frame format to 8bit.
  383. *
  384. * @return none
  385. */
  386. void SPI_DataSizeConfig(SPI_TypeDef *SPIx, uint16_t SPI_DataSize)
  387. {
  388. SPIx->CTLR1 &= (uint16_t)~SPI_DataSize_16b;
  389. SPIx->CTLR1 |= SPI_DataSize;
  390. }
  391. /*********************************************************************
  392. * @fn SPI_TransmitCRC
  393. *
  394. * @brief Transmit the SPIx CRC value.
  395. *
  396. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  397. *
  398. * @return none
  399. */
  400. void SPI_TransmitCRC(SPI_TypeDef *SPIx)
  401. {
  402. SPIx->CTLR1 |= CTLR1_CRCNext_Set;
  403. }
  404. /*********************************************************************
  405. * @fn SPI_CalculateCRC
  406. *
  407. * @brief Enables or disables the CRC value calculation of the transferred bytes.
  408. *
  409. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  410. * NewState - new state of the SPIx CRC value calculation.
  411. *
  412. * @return none
  413. */
  414. void SPI_CalculateCRC(SPI_TypeDef *SPIx, FunctionalState NewState)
  415. {
  416. if(NewState != DISABLE)
  417. {
  418. SPIx->CTLR1 |= CTLR1_CRCEN_Set;
  419. }
  420. else
  421. {
  422. SPIx->CTLR1 &= CTLR1_CRCEN_Reset;
  423. }
  424. }
  425. /*********************************************************************
  426. * @fn SPI_GetCRC
  427. *
  428. * @brief Returns the transmit or the receive CRC register value for the specified SPI.
  429. *
  430. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  431. * SPI_CRC - specifies the CRC register to be read.
  432. * SPI_CRC_Tx - Selects Tx CRC register.
  433. * SPI_CRC_Rx - Selects Rx CRC register.
  434. *
  435. * @return crcreg: The selected CRC register value.
  436. */
  437. uint16_t SPI_GetCRC(SPI_TypeDef *SPIx, uint8_t SPI_CRC)
  438. {
  439. uint16_t crcreg = 0;
  440. if(SPI_CRC != SPI_CRC_Rx)
  441. {
  442. crcreg = SPIx->TCRCR;
  443. }
  444. else
  445. {
  446. crcreg = SPIx->RCRCR;
  447. }
  448. return crcreg;
  449. }
  450. /*********************************************************************
  451. * @fn SPI_GetCRCPolynomial
  452. *
  453. * @brief Returns the CRC Polynomial register value for the specified SPI.
  454. *
  455. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  456. *
  457. * @return SPIx->CRCR - The CRC Polynomial register value.
  458. */
  459. uint16_t SPI_GetCRCPolynomial(SPI_TypeDef *SPIx)
  460. {
  461. return SPIx->CRCR;
  462. }
  463. /*********************************************************************
  464. * @fn SPI_BiDirectionalLineConfig
  465. *
  466. * @brief Selects the data transfer direction in bi-directional mode
  467. * for the specified SPI.
  468. *
  469. * @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
  470. * SPI_Direction - specifies the data transfer direction in
  471. * bi-directional mode.
  472. * SPI_Direction_Tx - Selects Tx transmission direction.
  473. * SPI_Direction_Rx - Selects Rx receive direction.
  474. *
  475. * @return none
  476. */
  477. void SPI_BiDirectionalLineConfig(SPI_TypeDef *SPIx, uint16_t SPI_Direction)
  478. {
  479. if(SPI_Direction == SPI_Direction_Tx)
  480. {
  481. SPIx->CTLR1 |= SPI_Direction_Tx;
  482. }
  483. else
  484. {
  485. SPIx->CTLR1 &= SPI_Direction_Rx;
  486. }
  487. }
  488. /*********************************************************************
  489. * @fn SPI_I2S_GetFlagStatus
  490. *
  491. * @brief Checks whether the specified SPI/I2S flag is set or not.
  492. *
  493. * @param SPIx - where x can be
  494. * - 1, 2 or 3 in SPI mode.
  495. * - 2 or 3 in I2S mode.
  496. * SPI_I2S_FLAG - specifies the SPI/I2S flag to check.
  497. * SPI_I2S_FLAG_TXE - Transmit buffer empty flag.
  498. * SPI_I2S_FLAG_RXNE - Receive buffer not empty flag.
  499. * SPI_I2S_FLAG_BSY - Busy flag.
  500. * SPI_I2S_FLAG_OVR - Overrun flag.
  501. * SPI_FLAG_MODF - Mode Fault flag.
  502. * SPI_FLAG_CRCERR - CRC Error flag.
  503. * I2S_FLAG_UDR - Underrun Error flag.
  504. * I2S_FLAG_CHSIDE - Channel Side flag.
  505. *
  506. * @return FlagStatus: SET or RESET.
  507. */
  508. FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG)
  509. {
  510. FlagStatus bitstatus = RESET;
  511. if((SPIx->STATR & SPI_I2S_FLAG) != (uint16_t)RESET)
  512. {
  513. bitstatus = SET;
  514. }
  515. else
  516. {
  517. bitstatus = RESET;
  518. }
  519. return bitstatus;
  520. }
  521. /*********************************************************************
  522. * @fn SPI_I2S_ClearFlag
  523. *
  524. * @brief Clears the SPIx CRC Error (CRCERR) flag.
  525. *
  526. * @param SPIx - where x can be
  527. * - 1, 2 or 3 in SPI mode.
  528. * - 2 or 3 in I2S mode.
  529. * SPI_I2S_FLAG - specifies the SPI flag to clear.
  530. * SPI_FLAG_CRCERR - CRC Error flag.
  531. * Note-
  532. * - OVR (OverRun error) flag is cleared by software sequence: a read
  533. * operation to SPI_DATAR register (SPI_I2S_ReceiveData()) followed by a read
  534. * operation to SPI_STATR register (SPI_I2S_GetFlagStatus()).
  535. * - UDR (UnderRun error) flag is cleared by a read operation to
  536. * SPI_STATR register (SPI_I2S_GetFlagStatus()).
  537. * - MODF (Mode Fault) flag is cleared by software sequence: a read/write
  538. * operation to SPI_STATR register (SPI_I2S_GetFlagStatus()) followed by a
  539. * write operation to SPI_CTLR1 register (SPI_Cmd() to enable the SPI).
  540. * @return FlagStatus: SET or RESET.
  541. */
  542. void SPI_I2S_ClearFlag(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG)
  543. {
  544. SPIx->STATR = (uint16_t)~SPI_I2S_FLAG;
  545. }
  546. /*********************************************************************
  547. * @fn SPI_I2S_GetITStatus
  548. *
  549. * @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
  550. *
  551. * @param SPIx - where x can be
  552. * - 1, 2 or 3 in SPI mode.
  553. * - 2 or 3 in I2S mode.
  554. * SPI_I2S_IT - specifies the SPI/I2S interrupt source to check..
  555. * SPI_I2S_IT_TXE - Transmit buffer empty interrupt.
  556. * SPI_I2S_IT_RXNE - Receive buffer not empty interrupt.
  557. * SPI_I2S_IT_OVR - Overrun interrupt.
  558. * SPI_IT_MODF - Mode Fault interrupt.
  559. * SPI_IT_CRCERR - CRC Error interrupt.
  560. * I2S_IT_UDR - Underrun Error interrupt.
  561. *
  562. * @return FlagStatus: SET or RESET.
  563. */
  564. ITStatus SPI_I2S_GetITStatus(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT)
  565. {
  566. ITStatus bitstatus = RESET;
  567. uint16_t itpos = 0, itmask = 0, enablestatus = 0;
  568. itpos = 0x01 << (SPI_I2S_IT & 0x0F);
  569. itmask = SPI_I2S_IT >> 4;
  570. itmask = 0x01 << itmask;
  571. enablestatus = (SPIx->CTLR2 & itmask);
  572. if(((SPIx->STATR & itpos) != (uint16_t)RESET) && enablestatus)
  573. {
  574. bitstatus = SET;
  575. }
  576. else
  577. {
  578. bitstatus = RESET;
  579. }
  580. return bitstatus;
  581. }
  582. /*********************************************************************
  583. * @fn SPI_I2S_ClearITPendingBit
  584. *
  585. * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
  586. *
  587. * @param SPIx - where x can be
  588. * - 1, 2 or 3 in SPI mode.
  589. * SPI_I2S_IT - specifies the SPI interrupt pending bit to clear.
  590. * SPI_IT_CRCERR - CRC Error interrupt.
  591. * Note-
  592. * - OVR (OverRun Error) interrupt pending bit is cleared by software
  593. * sequence: a read operation to SPI_DATAR register (SPI_I2S_ReceiveData())
  594. * followed by a read operation to SPI_STATR register (SPI_I2S_GetITStatus()).
  595. * - UDR (UnderRun Error) interrupt pending bit is cleared by a read
  596. * operation to SPI_STATR register (SPI_I2S_GetITStatus()).
  597. * - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
  598. * a read/write operation to SPI_STATR register (SPI_I2S_GetITStatus())
  599. * followed by a write operation to SPI_CTLR1 register (SPI_Cmd() to enable
  600. * the SPI).
  601. * @return none
  602. */
  603. void SPI_I2S_ClearITPendingBit(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT)
  604. {
  605. uint16_t itpos = 0;
  606. itpos = 0x01 << (SPI_I2S_IT & 0x0F);
  607. SPIx->STATR = (uint16_t)~itpos;
  608. }