Home Esplora Aiuto
Registrati Accedi
lc
/
ISCS_CABINET_CONTROL
1
0
Forka 0
File Problemi 0 Pull Requests 0 Wiki
Albero (Tree): e1bfcf1282
Rami (Branch) Tag
ISCS_CABINET_CO...
/
Library
/
SRC
/
Peripheral
/
inc
/
ch32v20x_rcc.h

ch32v20x_rcc.h 12 KB
Cronologia Originale

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264 
  1. /********************************** (C) COPYRIGHT  *******************************
    2. 

  2.  * File Name          : ch32v20x_rcc.h
    3. 

  3.  * Author             : WCH
    4. 

  4.  * Version            : V1.0.0
    5. 

  5.  * Date               : 2024/02/21
    6. 

  6.  * Description        : This file provides all the RCC firmware functions.
    7. 

  7. *********************************************************************************
    8. 

  8. * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
    9. 

  9. * Attention: This software (modified or not) and binary are used for 
    10. 

  10. * microcontroller manufactured by Nanjing Qinheng Microelectronics.
    11. 

  11. *******************************************************************************/
    12. 

  12. #ifndef __CH32V20x_RCC_H
    13. 

  13. #define __CH32V20x_RCC_H
    14. 

  14. 

  15. #ifdef __cplusplus
    16. 

  16. extern "C" {
    17. 

  17. #endif
    18. 

  18. 

  19. #include "ch32v20x.h"
    20. 

  20. 

  21. /* RCC_Exported_Types */
    22. 

  22. typedef struct
    23. 

  23. {
    24. 

  24.     uint32_t SYSCLK_Frequency; /* returns SYSCLK clock frequency expressed in Hz */
    25. 

  25.     uint32_t HCLK_Frequency;   /* returns HCLK clock frequency expressed in Hz */
    26. 

  26.     uint32_t PCLK1_Frequency;  /* returns PCLK1 clock frequency expressed in Hz */
    27. 

  27.     uint32_t PCLK2_Frequency;  /* returns PCLK2 clock frequency expressed in Hz */
    28. 

  28.     uint32_t ADCCLK_Frequency; /* returns ADCCLK clock frequency expressed in Hz */
    29. 

  29. } RCC_ClocksTypeDef;
    30. 

  30. 

  31. /* HSE_configuration */
    32. 

  32. #define RCC_HSE_OFF                     ((uint32_t)0x00000000)
    33. 

  33. #define RCC_HSE_ON                      ((uint32_t)0x00010000)
    34. 

  34. #define RCC_HSE_Bypass                  ((uint32_t)0x00040000)
    35. 

  35. 

  36. /* PLL_entry_clock_source */
    37. 

  37. #define RCC_PLLSource_HSI_Div2          ((uint32_t)0x00000000)
    38. 

  38. #define RCC_PLLSource_HSE_Div1          ((uint32_t)0x00010000)
    39. 

  39. #define RCC_PLLSource_HSE_Div2          ((uint32_t)0x00030000)
    40. 

  40. 

  41. /* PLL_multiplication_factor for other CH32V20x  */
    42. 

  42. #define RCC_PLLMul_2                    ((uint32_t)0x00000000)
    43. 

  43. #define RCC_PLLMul_3                    ((uint32_t)0x00040000)
    44. 

  44. #define RCC_PLLMul_4                    ((uint32_t)0x00080000)
    45. 

  45. #define RCC_PLLMul_5                    ((uint32_t)0x000C0000)
    46. 

  46. #define RCC_PLLMul_6                    ((uint32_t)0x00100000)
    47. 

  47. #define RCC_PLLMul_7                    ((uint32_t)0x00140000)
    48. 

  48. #define RCC_PLLMul_8                    ((uint32_t)0x00180000)
    49. 

  49. #define RCC_PLLMul_9                    ((uint32_t)0x001C0000)
    50. 

  50. #define RCC_PLLMul_10                   ((uint32_t)0x00200000)
    51. 

  51. #define RCC_PLLMul_11                   ((uint32_t)0x00240000)
    52. 

  52. #define RCC_PLLMul_12                   ((uint32_t)0x00280000)
    53. 

  53. #define RCC_PLLMul_13                   ((uint32_t)0x002C0000)
    54. 

  54. #define RCC_PLLMul_14                   ((uint32_t)0x00300000)
    55. 

  55. #define RCC_PLLMul_15                   ((uint32_t)0x00340000)
    56. 

  56. #define RCC_PLLMul_16                   ((uint32_t)0x00380000)
    57. 

  57. #define RCC_PLLMul_18                   ((uint32_t)0x003C0000)
    58. 

  58. 

  59. /* System_clock_source */
    60. 

  60. #define RCC_SYSCLKSource_HSI            ((uint32_t)0x00000000)
    61. 

  61. #define RCC_SYSCLKSource_HSE            ((uint32_t)0x00000001)
    62. 

  62. #define RCC_SYSCLKSource_PLLCLK         ((uint32_t)0x00000002)
    63. 

  63. 

  64. /* AHB_clock_source */
    65. 

  65. #define RCC_SYSCLK_Div1                 ((uint32_t)0x00000000)
    66. 

  66. #define RCC_SYSCLK_Div2                 ((uint32_t)0x00000080)
    67. 

  67. #define RCC_SYSCLK_Div4                 ((uint32_t)0x00000090)
    68. 

  68. #define RCC_SYSCLK_Div8                 ((uint32_t)0x000000A0)
    69. 

  69. #define RCC_SYSCLK_Div16                ((uint32_t)0x000000B0)
    70. 

  70. #define RCC_SYSCLK_Div64                ((uint32_t)0x000000C0)
    71. 

  71. #define RCC_SYSCLK_Div128               ((uint32_t)0x000000D0)
    72. 

  72. #define RCC_SYSCLK_Div256               ((uint32_t)0x000000E0)
    73. 

  73. #define RCC_SYSCLK_Div512               ((uint32_t)0x000000F0)
    74. 

  74. 

  75. /* APB1_APB2_clock_source */
    76. 

  76. #define RCC_HCLK_Div1                   ((uint32_t)0x00000000)
    77. 

  77. #define RCC_HCLK_Div2                   ((uint32_t)0x00000400)
    78. 

  78. #define RCC_HCLK_Div4                   ((uint32_t)0x00000500)
    79. 

  79. #define RCC_HCLK_Div8                   ((uint32_t)0x00000600)
    80. 

  80. #define RCC_HCLK_Div16                  ((uint32_t)0x00000700)
    81. 

  81. 

  82. /* RCC_Interrupt_source */
    83. 

  83. #define RCC_IT_LSIRDY                   ((uint8_t)0x01)
    84. 

  84. #define RCC_IT_LSERDY                   ((uint8_t)0x02)
    85. 

  85. #define RCC_IT_HSIRDY                   ((uint8_t)0x04)
    86. 

  86. #define RCC_IT_HSERDY                   ((uint8_t)0x08)
    87. 

  87. #define RCC_IT_PLLRDY                   ((uint8_t)0x10)
    88. 

  88. #define RCC_IT_CSS                      ((uint8_t)0x80)
    89. 

  89. 

  90. /* USB_Device_clock_source */
    91. 

  91. #define RCC_USBCLKSource_PLLCLK_Div1    ((uint8_t)0x00)
    92. 

  92. #define RCC_USBCLKSource_PLLCLK_Div2    ((uint8_t)0x01)
    93. 

  93. #define RCC_USBCLKSource_PLLCLK_Div3    ((uint8_t)0x02)
    94. 

  94. 

  95. #if defined (CH32V20x_D8) || defined (CH32V20x_D8W)
    96. 

  96.   #define RCC_USBCLKSource_PLLCLK_Div5    ((uint8_t)0x03)
    97. 

  97. 

  98. #endif
    99. 

  99. 

  100. /* ADC_clock_source */
    101. 

  101. #define RCC_PCLK2_Div2                 ((uint32_t)0x00000000)
    102. 

  102. #define RCC_PCLK2_Div4                 ((uint32_t)0x00004000)
    103. 

  103. #define RCC_PCLK2_Div6                 ((uint32_t)0x00008000)
    104. 

  104. #define RCC_PCLK2_Div8                 ((uint32_t)0x0000C000)
    105. 

  105. 

  106. /* LSE_configuration */
    107. 

  107. #define RCC_LSE_OFF                    ((uint8_t)0x00)
    108. 

  108. #define RCC_LSE_ON                     ((uint8_t)0x01)
    109. 

  109. #define RCC_LSE_Bypass                 ((uint8_t)0x04)
    110. 

  110. 

  111. /* RTC_clock_source */
    112. 

  112. #define RCC_RTCCLKSource_LSE           ((uint32_t)0x00000100)
    113. 

  113. #define RCC_RTCCLKSource_LSI           ((uint32_t)0x00000200)
    114. 

  114. 

  115. #if defined(CH32V20x_D8) || defined(CH32V20x_D8W)
    116. 

  116. #define RCC_RTCCLKSource_HSE_Div512    ((uint32_t)0x00000300)
    117. 

  117. #else
    118. 

  118. #define RCC_RTCCLKSource_HSE_Div128    ((uint32_t)0x00000300)
    119. 

  119. #endif
    120. 

  120. 

  121. /* AHB_peripheral */
    122. 

  122. #define RCC_AHBPeriph_DMA1             ((uint32_t)0x00000001)
    123. 

  123. #define RCC_AHBPeriph_DMA2             ((uint32_t)0x00000002)
    124. 

  124. #define RCC_AHBPeriph_SRAM             ((uint32_t)0x00000004)
    125. 

  125. #define RCC_AHBPeriph_CRC              ((uint32_t)0x00000040)
    126. 

  126. #define RCC_AHBPeriph_FSMC             ((uint32_t)0x00000100)
    127. 

  127. #define RCC_AHBPeriph_RNG              ((uint32_t)0x00000200)
    128. 

  128. #define RCC_AHBPeriph_SDIO             ((uint32_t)0x00000400)
    129. 

  129. #define RCC_AHBPeriph_USBHS            ((uint32_t)0x00000800)
    130. 

  130. #define RCC_AHBPeriph_USBFS            ((uint32_t)0x00001000)
    131. 

  131. #define RCC_AHBPeriph_OTG_FS           RCC_AHBPeriph_USBFS
    132. 

  132. 

  133. #ifdef CH32V20x_D8W
    134. 

  134. #define RCC_AHBPeriph_BLE_CRC          ((uint32_t)0x00030040)
    135. 

  135. #endif
    136. 

  136. 

  137. /* APB2_peripheral */
    138. 

  138. #define RCC_APB2Periph_AFIO            ((uint32_t)0x00000001)
    139. 

  139. #define RCC_APB2Periph_GPIOA           ((uint32_t)0x00000004)
    140. 

  140. #define RCC_APB2Periph_GPIOB           ((uint32_t)0x00000008)
    141. 

  141. #define RCC_APB2Periph_GPIOC           ((uint32_t)0x00000010)
    142. 

  142. #define RCC_APB2Periph_GPIOD           ((uint32_t)0x00000020)
    143. 

  143. #define RCC_APB2Periph_GPIOE           ((uint32_t)0x00000040)
    144. 

  144. #define RCC_APB2Periph_ADC1            ((uint32_t)0x00000200)
    145. 

  145. #define RCC_APB2Periph_ADC2            ((uint32_t)0x00000400)
    146. 

  146. #define RCC_APB2Periph_TIM1            ((uint32_t)0x00000800)
    147. 

  147. #define RCC_APB2Periph_SPI1            ((uint32_t)0x00001000)
    148. 

  148. #define RCC_APB2Periph_TIM8            ((uint32_t)0x00002000)
    149. 

  149. #define RCC_APB2Periph_USART1          ((uint32_t)0x00004000)
    150. 

  150. #define RCC_APB2Periph_TIM9            ((uint32_t)0x00080000)
    151. 

  151. #define RCC_APB2Periph_TIM10           ((uint32_t)0x00100000)
    152. 

  152. 

  153. /* APB1_peripheral */
    154. 

  154. #define RCC_APB1Periph_TIM2            ((uint32_t)0x00000001)
    155. 

  155. #define RCC_APB1Periph_TIM3            ((uint32_t)0x00000002)
    156. 

  156. #define RCC_APB1Periph_TIM4            ((uint32_t)0x00000004)
    157. 

  157. #define RCC_APB1Periph_TIM5            ((uint32_t)0x00000008)
    158. 

  158. #define RCC_APB1Periph_TIM6            ((uint32_t)0x00000010)
    159. 

  159. #define RCC_APB1Periph_TIM7            ((uint32_t)0x00000020)
    160. 

  160. #define RCC_APB1Periph_UART6           ((uint32_t)0x00000040)
    161. 

  161. #define RCC_APB1Periph_UART7           ((uint32_t)0x00000080)
    162. 

  162. #define RCC_APB1Periph_UART8           ((uint32_t)0x00000100)
    163. 

  163. #define RCC_APB1Periph_WWDG            ((uint32_t)0x00000800)
    164. 

  164. #define RCC_APB1Periph_SPI2            ((uint32_t)0x00004000)
    165. 

  165. #define RCC_APB1Periph_SPI3            ((uint32_t)0x00008000)
    166. 

  166. #define RCC_APB1Periph_USART2          ((uint32_t)0x00020000)
    167. 

  167. #define RCC_APB1Periph_USART3          ((uint32_t)0x00040000)
    168. 

  168. #define RCC_APB1Periph_UART4           ((uint32_t)0x00080000)
    169. 

  169. #define RCC_APB1Periph_UART5           ((uint32_t)0x00100000)
    170. 

  170. #define RCC_APB1Periph_I2C1            ((uint32_t)0x00200000)
    171. 

  171. #define RCC_APB1Periph_I2C2            ((uint32_t)0x00400000)
    172. 

  172. #define RCC_APB1Periph_USB             ((uint32_t)0x00800000)
    173. 

  173. #define RCC_APB1Periph_CAN1            ((uint32_t)0x02000000)
    174. 

  174. #define RCC_APB1Periph_CAN2            ((uint32_t)0x04000000)
    175. 

  175. #define RCC_APB1Periph_BKP             ((uint32_t)0x08000000)
    176. 

  176. #define RCC_APB1Periph_PWR             ((uint32_t)0x10000000)
    177. 

  177. #define RCC_APB1Periph_DAC             ((uint32_t)0x20000000)
    178. 

  178. 

  179. /* Clock_source_to_output_on_MCO_pin */
    180. 

  180. #define RCC_MCO_NoClock                ((uint8_t)0x00)
    181. 

  181. #define RCC_MCO_SYSCLK                 ((uint8_t)0x04)
    182. 

  182. #define RCC_MCO_HSI                    ((uint8_t)0x05)
    183. 

  183. #define RCC_MCO_HSE                    ((uint8_t)0x06)
    184. 

  184. #define RCC_MCO_PLLCLK_Div2            ((uint8_t)0x07)
    185. 

  185. 

  186. /* RCC_Flag */
    187. 

  187. #define RCC_FLAG_HSIRDY                ((uint8_t)0x21)
    188. 

  188. #define RCC_FLAG_HSERDY                ((uint8_t)0x31)
    189. 

  189. #define RCC_FLAG_PLLRDY                ((uint8_t)0x39)
    190. 

  190. #define RCC_FLAG_LSERDY                ((uint8_t)0x41)
    191. 

  191. #define RCC_FLAG_LSIRDY                ((uint8_t)0x61)
    192. 

  192. #define RCC_FLAG_PINRST                ((uint8_t)0x7A)
    193. 

  193. #define RCC_FLAG_PORRST                ((uint8_t)0x7B)
    194. 

  194. #define RCC_FLAG_SFTRST                ((uint8_t)0x7C)
    195. 

  195. #define RCC_FLAG_IWDGRST               ((uint8_t)0x7D)
    196. 

  196. #define RCC_FLAG_WWDGRST               ((uint8_t)0x7E)
    197. 

  197. #define RCC_FLAG_LPWRRST               ((uint8_t)0x7F)
    198. 

  198. 

  199. /* SysTick_clock_source */
    200. 

  200. #define SysTick_CLKSource_HCLK_Div8    ((uint32_t)0xFFFFFFFB)
    201. 

  201. #define SysTick_CLKSource_HCLK         ((uint32_t)0x00000004)
    202. 

  202. 

  203. /* USBFS_clock_source */
    204. 

  204. #define RCC_USBPLL_Div1                ((uint32_t)0x00)
    205. 

  205. #define RCC_USBPLL_Div2                ((uint32_t)0x01)
    206. 

  206. #define RCC_USBPLL_Div3                ((uint32_t)0x02)
    207. 

  207. #define RCC_USBPLL_Div4                ((uint32_t)0x03)
    208. 

  208. #define RCC_USBPLL_Div5                ((uint32_t)0x04)
    209. 

  209. #define RCC_USBPLL_Div6                ((uint32_t)0x05)
    210. 

  210. #define RCC_USBPLL_Div7                ((uint32_t)0x06)
    211. 

  211. #define RCC_USBPLL_Div8                ((uint32_t)0x07)
    212. 

  212. 

  213. /* ETH_clock_source */
    214. 

  214. #if defined(CH32V20x_D8) || defined(CH32V20x_D8W)
    215. 

  215.   #define RCC_ETHCLK_Div1    ((uint32_t)0x00)
    216. 

  216.   #define RCC_ETHCLK_Div2    ((uint32_t)0x01)
    217. 

  217. 

  218. #endif
    219. 

  219. 

  220. void        RCC_DeInit(void);
    221. 

  221. void        RCC_HSEConfig(uint32_t RCC_HSE);
    222. 

  222. ErrorStatus RCC_WaitForHSEStartUp(void);
    223. 

  223. void        RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
    224. 

  224. void        RCC_HSICmd(FunctionalState NewState);
    225. 

  225. void        RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul);
    226. 

  226. void        RCC_PLLCmd(FunctionalState NewState);
    227. 

  227. void        RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
    228. 

  228. uint8_t     RCC_GetSYSCLKSource(void);
    229. 

  229. void        RCC_HCLKConfig(uint32_t RCC_SYSCLK);
    230. 

  230. void        RCC_PCLK1Config(uint32_t RCC_HCLK);
    231. 

  231. void        RCC_PCLK2Config(uint32_t RCC_HCLK);
    232. 

  232. void        RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
    233. 

  233. void        RCC_USBCLKConfig(uint32_t RCC_USBCLKSource);
    234. 

  234. void        RCC_ADCCLKConfig(uint32_t RCC_PCLK2);
    235. 

  235. void        RCC_LSEConfig(uint8_t RCC_LSE);
    236. 

  236. void        RCC_LSICmd(FunctionalState NewState);
    237. 

  237. void        RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);
    238. 

  238. void        RCC_RTCCLKCmd(FunctionalState NewState);
    239. 

  239. void        RCC_GetClocksFreq(RCC_ClocksTypeDef *RCC_Clocks);
    240. 

  240. void        RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
    241. 

  241. void        RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
    242. 

  242. void        RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
    243. 

  243. void        RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
    244. 

  244. void        RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
    245. 

  245. void        RCC_BackupResetCmd(FunctionalState NewState);
    246. 

  246. void        RCC_ClockSecuritySystemCmd(FunctionalState NewState);
    247. 

  247. void        RCC_MCOConfig(uint8_t RCC_MCO);
    248. 

  248. FlagStatus  RCC_GetFlagStatus(uint8_t RCC_FLAG);
    249. 

  249. void        RCC_ClearFlag(void);
    250. 

  250. ITStatus    RCC_GetITStatus(uint8_t RCC_IT);
    251. 

  251. void        RCC_ClearITPendingBit(uint8_t RCC_IT);
    252. 

  252. void        RCC_ADCCLKADJcmd(FunctionalState NewState);
    253. 

  253. FlagStatus  RCC_USB5PRE_JUDGE();
    254. 

  254. 

  255. #if defined(CH32V20x_D8) || defined(CH32V20x_D8W)
    256. 

  256. void RCC_ETHDIVConfig(uint32_t RCC_ETHPRE_Div);
    257. 

  257. 

  258. #endif
    259. 

  259. 

  260. #ifdef __cplusplus
    261. 

  261. }
    262. 

  262. #endif
    263. 

  263. 

  264. #endif
    265.